Wisecracker is a high performance distributed cryptanalysis framework that leverages GPUs and multiple CPUs. It allows security researchers to write their own cryptanalysis tools that can distribute brute-force cryptanalysis work across multiple systems with multiple multi-core processors and GPUs. Security researchers can also use the sample tools provided out-of-the-box. The differentiating aspect of Wisecracker is that it uses OpenCL and MPI together to distribute the work across multiple systems, each having multiple CPUs and/or GPUs.
Pyrit takes a step ahead in attacking WPA-PSK and WPA2-PSK, the protocols that protect today's public WiFi-airspace. Pyrit's implementation allows you to create massive databases, pre-computing part of the WPA/WPA2-PSK authentication phase in a space-time-tradeoff. The performance gain for real-world-attacks is in the range of three orders of magnitude, which urges for re-consideration of the protocol's security. It exploits the computational power of multiple cores and other platforms through ATI-Stream, Nvidia CUDA, OpenCL, and VIA Padlock. It is a powerful attack against one of the world's most used security-protocols.
Libfairydust is a small wrapper library intended for use with GPU clusters that 'hijacks' CUDA and OpenCL calls. It can be used to 're-route' calls to a certain GPU, so a process requesting GPU#0 might end up running on GPU#4 without knowing (or caring) about it. This works completely transparently and does not need any sort of 'cooperation' from the application, changes to code, or relinking.
The Open Component Portability Infrastructure (OpenCPI) is a real-time embedded (RTE) middleware solution that simplifies programming of heterogeneous processing applications requiring a mix of field-programmable gate arrays (FPGA), general-purpose processors (GPP), digital signal processors (DSP), and high-speed switch fabrics. The "mix" can be over a lifecycle (technology insertion) as well as within a single implementation (to meet SWAP constraints). CPI improves code portability, interoperability, and performance in FPGA and DSP-based environments by providing well-defined waveform component APIs with a set of infrastructure blocks that act as a hardware abstraction layer (HAL).