Zyan Communication Framework simplifies development of distributed applications. It works on Windows, Linux, Mac OS, and Android platforms via .NET or Mono runtimes. It features LINQ support for three-tier applications, full duplex TCP support, traffic, compression, and encryption, transparent support for events and EBC (event-based components), and Windows and LDAP authentication support.
Dandelion is a 3D graph rendering application which can be controlled across a network. Its main purpose is to allow clear network graphs to be rendered in a window, which can be controlled by a separate application or the user. The Dandelion visualization is actually controlled by issuing simple commands to it across the network (although this could all be happening on a single machine). The Dandelion source includes a set of very simple libraries which can be incorporated into other applications and which can be used to send these commands. Libraries are included for C, C#, Java, and Python. The project was developed at Liverpool John Moores University within the PROTECT Centre.
Playtomic is a set of client and server APIs for game leaderboards, user generated content, and dynamic updates. It began as a hosted service providing tools and analytics for game developers, but is now available for developers to operate on their own. It includes the API server which is written in NodeJS and backed with MongoDB, along with game client APIs for HTML5, Flash, iOS, Android, Windows, and Unity3d games.
LibLogicalAccess is an RFID library developed in C++ for Linux/Windows, also available on C# for use on Microsoft operating systems (using a COM wrapper). It provides low-level commands access and high-level generic abstraction for several chips and readers (PC/SC readers like OMNIKEY, STid readers, etc.) on 125Khz (EM4102, HID Prox, etc.), 13.56Mhz ISO14443/ISO15693 (Mifare Classic, Mifare DESFire, HID iClass, etc.), and 433Mhz frequencies.
System# is a .NET library intended for the description of real-time embedded systems. It comes with a built-in simulator kernel and a code transformation engine that converts a design into synthesizable VHDL. The main focus is currently the development of FPGA designs. System# not only supports register-transfer-level (RTL) descriptions whose translation to VHDL is straightforward, but is also capable of converting clocked threads with wait statements to a synthesizable VHDL state machine. Furthermore, System# introduces synthesizable transaction-level modeling features. From a technological point of view, it uses reflection and assembly code (CIL) decompilation to reconstruct an abstract syntax tree (AST) from the system design. The AST conforms to SysDOM, a document object model for describing component-based reactive systems. An unparsing stage converts the AST to VHDL. The decompilation process can be instrumented in various ways by attribute-based programming. Furthermore, transformations of the AST itself are possible. This enables implementation of advanced features such as converting clocked threads to finite state machines.