JTAGTest is an IEEE 1149.1 JTAG Boundary scan tester for embedded designers, production houses, and service companies. It provides a significant aid for PCB debugging, prototyping, testing, and repairing. Using an IEEE 1149.1 (JTAG) boundary-scan, the device pin signals or internal signals can be monitored in real-time without interfering with normal device operation, and you can change pin state manually. It runs under Wine on 32-bit Linux distributions using special Linux support libraries, which are included in the distribution.
Confluence is a functional programming language for reactive system design, including FPGAs, ASICs, and hard-real-time software. Confluence system descriptions have a large information to linecount ratio. It is typically two to five times more compact than Verilog. Confluence can compile a single body of source code into to Verilog, VHDL, C, and NuSMV.
FerFT is a multi-purpose spectral analyzer based on the successive Fourier transformation method. It features an input signal monitor which can sample input signals through a microphone with various sample rates and show them graphically on the panel. It also lets you calculate power spectra successively along with sampled input signals and show them graphically on the panel. Finally, it provides a filter to modify spectra and regenerate signals from them.
Alliance CAD System is a set of EDA tools and portable cell libraries for VLSI design. It covers a wide range of the standard design flow (from VHDL up to layout). It includes a VHDL simulator, RTL synthesis tools, place and route tools, netlist extractor, DRC, and a layout editor.
iBookshelf is an application for cataloging your book collection and designing bookshelves based on this data. It supports ISBN entry using a CueCat, a standard barcode scanner, or manual entry. Book data is automatically fetched from Amazon Web services. Manual book entry is possible for non-catalogued books. Bookshelf design is done graphically with the Cairo drawing library, and is based on the most efficient book order.
YaPIDE aims to be a fully featured Microchip PIC simulator for Linux (and probably other Unixes). It is a GUI that provides a viewer for RAM, ROM, stack, breakpoints, and watchpoints, and has a source editor with inline debugging (ASM). The chip currently supported is the 16F628 (partial).
The ReliaFree Project is an alternative to commercial, proprietary reliability, availability, maintainability, and safety (RAMS) analysis software. The ReliaFree Project is an integrated suite of tools. Any number of analyses can be linked together such that an update to one module will result in all linked modules being updated appropriately. This approach provides a closed loop life-cycle with visibility into a product's performance throughout. The same database is used to store field failure data as is used to store design prediction information.