127 projects tagged "Electronic Design Automation (EDA)"

No download Website Updated 16 Oct 2012 Piklab

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Pop 107.68
Vit 9.96

Piklab is an integrated development environment for applications based on PIC and dsPIC microcontrollers. Supported compilers are: the Small Device C Compiler, the GNU PIC Utilities, PICC compilers, the PIC30 toolchain, the C18 compiler, the JAL and JALV2 compilers, the CSC compiler, and the Boost compilers. Supported programmers: ICD2, PICkit, PICkit2, PicStart+, and most direct programmers. Supported debuggers: ICD2 and GPSim. A commandline programmer/debugger is also provided.

No download Website Updated 11 Apr 2005 Pinapa

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Pop 22.45
Vit 57.75

Pinapa is a SystemC front-end based on GCC and the SystemC library itself. It is able to extract both the architecture and the syntax information of a SystemC program.

Download Website Updated 05 Oct 2001 Pinout

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Pop 21.00
Vit 67.96

Pinout is a PERL script which makes it easy to produce nice looking PostScript ballout/pinout images for BGA or PGA type integrated circuits (ICs), ASICs, FPGAs, or CPLDs.

Download Website Updated 10 Jun 2011 Platform Independent Petri Net Editor

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Pop 75.12
Vit 5.83

Platform Independent Petri Net Editor (PIPE) creates and analyses Petri Nets quickly, efficiently, and effectively. A key design feature is the modular approach adopted for analysis, enabling new modules to be written easily and powerfully, using built-in data layer methods for standard calculations. Six analysis modules are provided, including Invariant Analysis, State-Space Analysis (deadlock, etc.), and Simulation Analysis and Classification. PIPE adheres to the XML Petri net standard (PNML). The file format for saving and loading Petri Nets is extensible through the use of XSLT, the default being PNML.

Download Website Updated 12 Aug 2006 PySTDF

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Pop 15.30
Vit 1.00

PySTDF is a Python module which makes it easy to work with STDF (Teradyne's Standard Test Data Format). STDF is a commonly-used file format in semiconductor tests. Automated test equipment (ATE) from such vendors as Teradyne, Verigy, LTX, Credence, and others supports this format. PySTDF provides event-based stream parsing of STDF version 4, indexers that help structure the data into a more useful tabular form, and the ability to generate missing summary records or new types of derivative records. The parser architecture is very flexible and can easily be extended to support STDF version 3 and custom record types.

Download Website Updated 28 Jul 2005 QCADesigner

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Pop 37.09
Vit 2.07

QCADesigner is a Quantum-Dot Cellular Automata (QCA) circuit simulator. With powerful CAD capabilities, it allows the designer to quickly layout and simulate QCA circuits constructed with thousands of QCA cells. QCA is one of several emerging nanotechnologies with potential applications in future computers.

Download Website Updated 24 Mar 2006 QConsole Class

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Pop 24.08
Vit 1.00

The QConsole class is a custom widget that implements a basic console, written in C++ and relying on Qt. It implements several features and is intended to be inherited from in order to have a "real" console for a specific scripting language, shell, etc. Example implementations for TCL and Python are included.

Download Website Updated 20 Jun 2012 Qfsm

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Pop 131.86
Vit 9.53

Qfsm is a graphical editor for easily drawing finite state machines, written in C++ using Qt. Transitions can have either binary or ASCII conditions. Machines can be simulated and integrity checks applied, enabling verification of proper design and operation.

Download Website Updated 18 Mar 2011 Qucs

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Pop 188.14
Vit 7.25

Qucs is a circuit simulator with a graphical user interface. It aims to support all kinds of circuit simulation types, including DC, AC, S-parameter, and harmonic balance analysis.

No download Website Updated 05 Aug 2011 ReliaFree

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Pop 14.42
Vit 1.59

The ReliaFree Project is an alternative to commercial, proprietary reliability, availability, maintainability, and safety (RAMS) analysis software. The ReliaFree Project is an integrated suite of tools. Any number of analyses can be linked together such that an update to one module will result in all linked modules being updated appropriately. This approach provides a closed loop life-cycle with visibility into a product's performance throughout. The same database is used to store field failure data as is used to store design prediction information.

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bb_log

A fast and tiny logger for Java.

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CorneliOS

A virtual Web OS.