RSS 127 projects tagged "Electronic Design Automation (EDA)"

Download Website Updated 16 Jul 2012 DOLPHIN SLED

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Pop 61.48
Vit 6.83

DOLPHIN SLED is a hierarchical schematic entry solution with graphic linking of components, hierarchical configuration of the netlist, and multi-language netlisting (SPICE, Verilog, VHDL-AMS, etc.). Interoperability with other schematic entry tools, particularly the ECS family (including Synario, Cohesion, and Laker-AMS) is ensured for capitalizing on legacy designs and cooperative work. Interoperability is ensured through standard design exchange formats (EDIF2) and scriptability for customization.

Download Website Updated 25 Apr 2010 Mr Filter

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Pop 61.32
Vit 1.87

Mr Filter is an active filter design assistant. Electrical engineers can use it to design and simulate analog active filters.

Download Website Updated 16 Jun 2010 Balsa Asynchronous Synthesis System

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Pop 60.25
Vit 4.28

Balsa is an asynchronous circuit simulation and synthesis system. Balsa is built around the Handshake Circuits methology, and it can generate gate level netlists from high-level descriptions in the Balsa language. Both dual-rail (QDI) and single-rail (bundled data) circuits can be generated.

Download Website Updated 31 May 2005 Electronic Design Automation - Index

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Pop 59.83
Vit 3.31

Electronic Design Automation - Index is a system that can be used in the electronic world to keep track of your: Schematic, Printed Circuit Board, Front Plate, and Programmable Logic Unit numbers. This is very useful when you have drawn many electronic schematics and PCBs in an EDA program such as Eagle, gEDA, Protel, or Orcad. It's also useful if you've created a front plate layout in an image editor such as GIMP, Corel Draw, or Photoshop.

No download Website Updated 20 Sep 2002 Gnome Assisted Electronics

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Pop 59.16
Vit 3.16

Gael is an electronic design automation tool integrated into GNOME 2. It is designed to be easy to use, and to include advanced features. The design is very modular and open, using the GNOME component model (bonobo).

Download Website Updated 26 Oct 2004 DiaCanvas2

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Pop 58.48
Vit 4.19

DiaCanvas2 is a flexible diagramming widget. It is based on GnomeCanvas. It uses its own constraint solver to maintain relationships between items on the canvas. It is Model/View/Controller-based and makes full use of GnomeCanvas' features.

No download Website Updated 17 Feb 2005 Confluence System Design Language

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Pop 58.21
Vit 1.75

Confluence is a functional programming language for reactive system design, including FPGAs, ASICs, and hard-real-time software. Confluence system descriptions have a large information to linecount ratio. It is typically two to five times more compact than Verilog. Confluence can compile a single body of source code into to Verilog, VHDL, C, and NuSMV.

Download No website Updated 27 Jul 2010 FSMDesigner

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Pop 56.87
Vit 2.62

FSMDesigner is a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. It uses the Simple-Moore FSM model, guaranteeing efficient fast complex control circuits. It features graphical design of FSMs, support for automatic default transitions, validation of FSMs, a well-defined XML file format, generation of RTL HDL output for both Verilog and VHDL, full scriptability in Python, a modern GUI with undo and redo, simulation mode support, and table based data manipulation.

Download Website Updated 12 Nov 2002 ChipVault

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Pop 56.67
Vit 2.33

ChipVault is a chip development program for organizing VHDL and Verilog designs. ChipVault displays designs hierarchically and provides for rapid design navigation and editor launching. ChipVault provides hooks for performing bottom-up tasks such as launching RTL compilers, synthesis, block generation and instantiation, and includes simple to use Revision Control and Issue Tracking systems to help facilitate large group design projects with multiple designers and hundreds of design files. ChipVault is written in Perl and is small, fast, and efficient.

Download Website Updated 24 Dec 2004 HDLmaker

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Pop 56.66
Vit 1.19

HDLmaker generates hierarchical Verilog and VHDL code, PCB netlists, simulation and synthesis scripts/projects/make files, and schematics. It can translate Verilog/VHDL and HDLmaker projects into HTML, including extensive hyperlinking between the modules. It can also translate PADS PCB netlists into Verilog and VHDL and can do some simple VHDL to Verilog translations. HDLMaker synplifies the development of complex FPGAs and ASICs, and has extensive support for most Xilinx FPGAs.

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beets

A media library management system for obsessive-compulsive music geeks.

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WildMidi

A software wavetable synth.