gEDA is a suite of electronic design automation (EDA) tools. Currently, the project offers a mature suite of free software applications for electronics design, including schematic capture, attribute management, bill of materials (BOM) generation, netlisting into over 20 netlist formats, analog and digital simulation, and printed circuit board (PCB) layout.
Piklab is an integrated development environment for applications based on PIC and dsPIC microcontrollers. Supported compilers are: the Small Device C Compiler, the GNU PIC Utilities, PICC compilers, the PIC30 toolchain, the C18 compiler, the JAL and JALV2 compilers, the CSC compiler, and the Boost compilers. Supported programmers: ICD2, PICkit, PICkit2, PicStart+, and most direct programmers. Supported debuggers: ICD2 and GPSim. A commandline programmer/debugger is also provided.
Easy Funktion is 2D function plotter software with an equation solver. It has an office-like GUI frontend and features a built-in pocket calculator, calculating with complex numbers (with special extensions for electronics, e.g. capacitor/inductor impedance), a function to export to spreadsheet software, and an advanced formula editor with automatic formatting.
Covered is a Verilog code coverage utility that reads in a Verilog design and a generated VCD/LXT/FST dumpfile from that design and generates a coverage file that can be merged with other coverage files or used to create a coverage report. Covered also contains the GUI coverage report utility that reads in a coverage file to allow interactive coverage discovery. Areas of coverage measured by Covered are: line, toggle, memory, combinational logic, FSM state/state-transition and assertion coverage.
LayoutEditor is an IC/MEMS layout editor. It features all angle elements, a font generator, macros, Boolean operations, drc, netlist-driven layout, LVS, and cross-platform compatibility. Supported formats include Calma GDSII, OASIS (Open Artwork System Interchange Standard), DXF, CIF (Caltech Intermediate Form), Gerber, DEF/LEF, and many others.
DOLPHIN SLED is a hierarchical schematic entry solution with graphic linking of components, hierarchical configuration of the netlist, and multi-language netlisting (SPICE, Verilog, VHDL-AMS, etc.). Interoperability with other schematic entry tools, particularly the ECS family (including Synario, Cohesion, and Laker-AMS) is ensured for capitalizing on legacy designs and cooperative work. Interoperability is ensured through standard design exchange formats (EDIF2) and scriptability for customization.