WREC controls an SCPI-programmable power supply (such as Agilent E3631A) to reform large aluminum electrolytic capacitors. It was written specifically for the Computer History Museum PDP-1 Restoration Project, but should be useful for reforming capacitors for almost any old equipment, even audio gear.
VIPEC is an network analyser for electrical networks. It takes a description of an electrical network, and performs a simulation of the circuit response in the frequency domain. Output is in the form of 2-port parameters, and can be plotted on a grid and in Smithchart format. VIPEC supports various lumped circuit elements, as well as elements like transmission lines and 2-port data files.
JHDL is a set of FPGA CAD tools which allows the user to design the structure and layout of a circuit, debug the circuit in simulation, netlist, and interface with backend tools for synthesis, etc. It is an exploratory attempt to identify the key features and functionality of good FPGA tools.
GraphPak is a programming library of 2D and 3D charting objects for the Qt toolkit. It provides software developers with a set of C++ objects to easily create charts or graphs that aid in the visual presentation of technical and business data. This release includes Bar, Line, Pie, Ring, Area, Hi-Lo, Box and Whisker, and Polar charts. It is based on the KD Chart product from Klarälvdalens Datakonsult AB.
Taverna is a collection of workflow enactment and description components, including a high level language for workflows called Scufl (Simple Conceptual Unified Flow Language), a pure Java object model, parser to populate the model, and a set of views and controllers (including some Swing components to drop into your workflow-enabled applications). In order to actually run workflows you also need the myGrid workflow enactment engine.