124 projects tagged "Electronic Design Automation (EDA)"
Updated 30 Jan 2001
Bartels AutoEngineer
| Pop | 52.80 |
|---|---|
| Vit | 1.02 |
Bartels AutoEngineer is a commercial CAD tool for electrical / computer engineers. It supports Linux, Win95/NT, DOS, OS/2, HP, DEC and Sun. Features include a schematic Editor with hierarchical design support, Forward/Backward Annotation, PCB Layout system, CAM Processor, CAM View, Integrated, object-oriented database system, User Language Compiler, utility programs for database management, foreign net list and design data import, etc. and part libraries for SCM and PCB layout
Updated 30 Jan 2001
BitGen
| Pop | 49.36 |
|---|---|
| Vit | 2.04 |
BitGen accepts text strings of 1's, 0's and hex digits and converts them to equivalent "pwl" voltage sources for inclusion in netlists for circuit simulation (with SPICE or Spectre, for example). Periodic waveforms (eg, clocks) can be exported as "pulse" voltage sources. Parameters such as rise time, fall time, pulse width and duty cycle can be set on a waveform-by-waveform basis. BitGen is written in Perl with the Perl/Tk toolkit and has an easy-to-use graphical interface.
Updated 30 Jan 2001
DiaCanvas
| Pop | 49.54 |
|---|---|
| Vit | 1.44 |
DiaCanvas is a generalized version of the drawing canvas used by DIA. It extends some features used by DIA and adds new ones, while preserving as many of the original features as possible. This project is no longer actively maintained. It is suggested that you try DiaCanvas2 instead.
Updated 30 Jan 2001
Dinotrace
| Pop | 46.26 |
|---|---|
| Vit | 1.00 |
Dinotrace is a graphical viewer for Signal Wave files. It supports the output from Verilog, VCS, and other simulators in addition to simple ASCII. It includes a mode for GNU Emacs allowing signal values to be backannotated into Verilog or C source code.
Updated 03 Oct 2004
Eagle
| Pop | 103.80 |
|---|---|
| Vit | 2.56 |
The Eagle EDA software is composed of tightly integrated modules for PCB design, including Schematic Capture, Board Layout, and Autorouter. There is a free full-function (only board size limited) non-commercial license available for hobby and educational use as well. Windows, DOS, and of course, Linux versions are available.
Updated 24 Sep 2012
Electric
| Pop | 198.46 |
|---|---|
| Vit | 20.19 |
Electric is a complete EDA system that can handle many forms of circuit design, including Schematic Capture (digital and analog), Custom IC layout, Logic Simulation, Electro-mechanical hybrid layout, Programmable logic (FPGAs) and much more.
Updated 25 Feb 2010
gEDA
| Pop | 340.38 |
|---|---|
| Vit | 15.21 |
gEDA is a suite of electronic design automation (EDA) tools. Currently, the project offers a mature suite of free software applications for electronics design, including schematic capture, attribute management, bill of materials (BOM) generation, netlisting into over 20 netlist formats, analog and digital simulation, and printed circuit board (PCB) layout.
Updated 30 Jan 2001
ghydraulic
| Pop | 35.41 |
|---|---|
| Vit | 1.00 |
ghydraulic is hydraulic network analysis software, with the input files in XML format.
Updated 01 Nov 2012
GTKWave
| Pop | 165.05 |
|---|---|
| Vit | 41.83 |
GTKWave is a wave viewer for Verilog simulation. The viewer supports execution of Tcl scripts and enhanced Drag and Drop operations.
Updated 24 Dec 2004
HDLmaker
| Pop | 68.26 |
|---|---|
| Vit | 1.21 |
HDLmaker generates hierarchical Verilog and VHDL code, PCB netlists, simulation and synthesis scripts/projects/make files, and schematics. It can translate Verilog/VHDL and HDLmaker projects into HTML, including extensive hyperlinking between the modules. It can also translate PADS PCB netlists into Verilog and VHDL and can do some simple VHDL to Verilog translations. HDLMaker synplifies the development of complex FPGAs and ASICs, and has extensive support for most Xilinx FPGAs.
