RSS 117 projects tagged "Electronic Design Automation (EDA)"

Download Website Updated 17 Jun 1998 Signal Generator

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Pop 23.87
Vit 76.08

Signal Generator is a laboratory noise/sound generator which can be used to generate accurate sounds in fixed frequency, 2-channels (two frequencies going at once), a sweep-pattern, or in a specified sequence. It is useful when you need to generate a fixed sound for whatever purpose (in the laboratory, for sound effects, etc)

Download Website Updated 31 Jan 2002 SpiceViewMG

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Pop 20.10
Vit 66.82

SpiceViewMG consists of two main parts. It is aimed at NG-spice users. The first is a spice language viewer which picks out different elements of the spice, such as transistors or models, thus making editing easier. The second component is an interactive spice plotter.

Download No website Updated 21 Oct 2002 Hardware Simulator for Pesona 16

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Pop 15.23
Vit 64.82

HSP16 is a Pesona-16 (http://www.mysem.com) microprocessor simulation and development environment written in C. HSP16 is capable of simulating and running unmodified Pesona-16 assembly code.

No download Website Updated 18 Apr 2003 Verilator

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Pop 35.55
Vit 63.43

Verilator is a cycle based synthesizable Verilog hardware design language compiler. It produces C++ or SystemC output with speeds compariable to commercial products.

Download Website Updated 04 Jul 2004 mprog

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Pop 17.15
Vit 59.83

mprog is a tool for programming Atmel AVR 'mega' series microcontrollers via SPI, using an STK200 board. It can read and write the program flash and EEPROM, and supports both binary and Intel hex files.

No download Website Updated 11 Apr 2005 Pinapa

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Pop 24.00
Vit 57.43

Pinapa is a SystemC front-end based on GCC and the SystemC library itself. It is able to extract both the architecture and the syntax information of a SystemC program.

Download Website Updated 12 Aug 2006 ibistools

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Pop 22.63
Vit 53.02

ibistools is a small set of command-line tools that aid a PCB designer working with IBIS models. It currently consists of a full IBIS v4.1 parser and an IBIS to SPICE translator. IBIS (I/O Buffer Information Specification) is a standard, human-readable, machine-readable format for publishing IC specifications.

No download Website Updated 16 Mar 2007 The CBOLD Framework

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Pop 13.42
Vit 50.94

The CBOLD framework is a set of C++ classes and related source code for capturing board-level electronic designs. It allows the designer to capture and process an electronic board-level design using a text editor (or IDE) and a C++ compiler. It provides a concise, intuitive notation for schematicless capture of board-level designs. Instead of entering a schematic into an EDA tool, the designer creates a C++ program that describes the design and the desired outputs. When the program is compiled and run, it verifies the legality of the design and writes output files (CAD layout netlist, bill of materials, FPGA constraint files, etc.) to disk. Code primarily consists of definitions of modules, which are analogous to pages of a schematic design.

No download Website Updated 04 Apr 2008 Spice+

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Pop 16.85
Vit 47.01

Spice+ is a general-purpose circuit simulation program based directly on Spice3f5. Its main purpose is to allow university students and other interested people to simulate their circuits without buying expensive simulation programs or being limited by free trial versions of such software. Since source code is available, students or researchers can use it as a basis for new models and algorithms.

Download Website Updated 06 Nov 2008 HDL Tools Topcased

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Pop 12.57
Vit 44.66

HDL Tools Topcased is a set of tools dedicated to editing and checking HDL rules.

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Aspose.Slides for .NET

A .NET component to read, write, and modify a PowerPoint document.

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birq

IRQ balancing for Linux.