107 projects tagged "Electronic Design Automation (EDA)"
Updated 22 Apr 2013
Slam-Edit
| Pop | 150.40 |
|---|---|
| Vit | 42.87 |
Slam is a mature IC Layout editor with the ability to edit very large designs (such as stream files larger than 10GB). Novel features include threading for redraw, support for displaying on multiple X servers simultaneously, and a Tcl interface to the database for user extensibility. The system is a library based system with multi-user support. Programmable structures (P-Cells) are available in Tcl. The editor includes gds input and output.
Updated 20 Feb 2013
DOLPHIN SMASH
| Pop | 202.62 |
|---|---|
| Vit | 43.38 |
Dolphin Smash is a mixed-signal, multi-language simulator for IC or PCB designs. It uses SPICE syntax for analog descriptions, Verilog-HDL and VHDL for digital, Verilog-A/AMS, VHDL-AMS and ABCD (a combination of SPICE and C) for analog behavioral, and C for DSP algorithms.
Updated 21 Jan 2013
TTA-based Co-design Environment
| Pop | 101.42 |
|---|---|
| Vit | 9.35 |
TTA-based Co-design Environment (TCE) is a toolset that provides a complete co-design flow from C programs down to synthesizable VHDL and parallel program binaries. Processor customization points include the register files, function units, supported operations, and the interconnection network.
Updated 01 Nov 2012
GTKWave
| Pop | 162.19 |
|---|---|
| Vit | 41.33 |
GTKWave is a wave viewer for Verilog simulation. The viewer supports execution of Tcl scripts and enhanced Drag and Drop operations.
Updated 16 Oct 2012
Piklab
| Pop | 143.30 |
|---|---|
| Vit | 15.39 |
Piklab is an integrated development environment for applications based on PIC and dsPIC microcontrollers. Supported compilers are: the Small Device C Compiler, the GNU PIC Utilities, PICC compilers, the PIC30 toolchain, the C18 compiler, the JAL and JALV2 compilers, the CSC compiler, and the Boost compilers. Supported programmers: ICD2, PICkit, PICkit2, PicStart+, and most direct programmers. Supported debuggers: ICD2 and GPSim. A commandline programmer/debugger is also provided.
Updated 24 Sep 2012
Electric
| Pop | 196.79 |
|---|---|
| Vit | 19.99 |
Electric is a complete EDA system that can handle many forms of circuit design, including Schematic Capture (digital and analog), Custom IC layout, Logic Simulation, Electro-mechanical hybrid layout, Programmable logic (FPGAs) and much more.
Updated 16 Jul 2012
DOLPHIN SLED
| Pop | 84.68 |
|---|---|
| Vit | 9.02 |
DOLPHIN SLED is a hierarchical schematic entry solution with graphic linking of components, hierarchical configuration of the netlist, and multi-language netlisting (SPICE, Verilog, VHDL-AMS, etc.). Interoperability with other schematic entry tools, particularly the ECS family (including Synario, Cohesion, and Laker-AMS) is ensured for capitalizing on legacy designs and cooperative work. Interoperability is ensured through standard design exchange formats (EDIF2) and scriptability for customization.
Updated 20 Jun 2012
Qfsm
| Pop | 156.69 |
|---|---|
| Vit | 13.25 |
Qfsm is a graphical editor for easily drawing finite state machines, written in C++ using Qt. Transitions can have either binary or ASCII conditions. Machines can be simulated and integrity checks applied, enabling verification of proper design and operation.
Updated 18 May 2012
Scheture
| Pop | 72.19 |
|---|---|
| Vit | 7.46 |
Scheture is a hierarchical schematic capture system with built-in netlisters for Spice and Verilog. It has built-in plotting for Postscript, HP PCL and HP GL/2 printers and plotters. It includes a set of symbol primitives, and allows user-defined symbol primitives to allow for extensive customization of primitive properties. The system supports wire buses and iterated instances. The system also supports global pins and implicitly connected pins on a specific sheet. Supported platforms include Solaris and Linux (32- and 64-bit).
Updated 05 Aug 2011
ReliaFree
| Pop | 19.44 |
|---|---|
| Vit | 1.84 |
The ReliaFree Project is an alternative to commercial, proprietary reliability, availability, maintainability, and safety (RAMS) analysis software. The ReliaFree Project is an integrated suite of tools. Any number of analyses can be linked together such that an update to one module will result in all linked modules being updated appropriately. This approach provides a closed loop life-cycle with visibility into a product's performance throughout. The same database is used to store field failure data as is used to store design prediction information.
