ACL2 is a mathematical logic, programming language, and mechanical theorem prover based on the applicative subset of Common Lisp. It is an "industrial-strength" version of the NQTHM or Boyer/Moore theorem prover, and has been used for the formal verification of commercial microprocessors, the Java Virtual Machine, interesting algorithms, and so forth.
Alliance CAD System is a set of EDA tools and portable cell libraries for VLSI design. It covers a wide range of the standard design flow (from VHDL up to layout). It includes a VHDL simulator, RTL synthesis tools, place and route tools, netlist extractor, DRC, and a layout editor.
BOUML is a UML 2 tool box that allows you to specify and generate code in C++, Java, IDL, and PHP. BOUML is very fast and doesn't require much memory to manage several thousands of classes. BOUML is extensible, and the external tools (named plug-outs) can be written in C++ or Java, using BOUML for their definition as any other program. UML models can be exported to HTML pages, including PNG or SVG graphics.
Balsa is an asynchronous circuit simulation and synthesis system. Balsa is built around the Handshake Circuits methology, and it can generate gate level netlists from high-level descriptions in the Balsa language. Both dual-rail (QDI) and single-rail (bundled data) circuits can be generated.
Bartels AutoEngineer is a commercial CAD tool for electrical / computer engineers. It supports Linux, Win95/NT, DOS, OS/2, HP, DEC and Sun. Features include a schematic Editor with hierarchical design support, Forward/Backward Annotation, PCB Layout system, CAM Processor, CAM View, Integrated, object-oriented database system, User Language Compiler, utility programs for database management, foreign net list and design data import, etc. and part libraries for SCM and PCB layout
BitGen accepts text strings of 1's, 0's and hex digits and converts them to equivalent "pwl" voltage sources for inclusion in netlists for circuit simulation (with SPICE or Spectre, for example). Periodic waveforms (eg, clocks) can be exported as "pulse" voltage sources. Parameters such as rise time, fall time, pulse width and duty cycle can be set on a waveform-by-waveform basis. BitGen is written in Perl with the Perl/Tk toolkit and has an easy-to-use graphical interface.