6 projects tagged "Cygwin"
Updated 29 May 2011
mprfgen
| Pop | 18.22 |
|---|---|
| Vit | 26.85 |
mprfgen is a multi-port memory generator that can be used for VHDL designs. It can generate either generic or Xilinx-specific (through component instantiation) multi-port memories.
Updated 18 Apr 2009
UrJTAG
| Pop | 55.43 |
|---|---|
| Vit | 2.30 |
UrJTAG aims to create an enhanced, modern tool for communicating over JTAG with flash chips, CPUs, and many more. It takes on the well proven openwince jtag tools code. Future plans include conversion of the code base into a library that can be used with other applications. A flexible remote communication protocol that can be used over almost any type of serial link (including TCP/IP) is currently being defined.
Updated 12 Aug 2006
ibistools
| Pop | 23.32 |
|---|---|
| Vit | 49.73 |
ibistools is a small set of command-line tools that aid a PCB designer working with IBIS models. It currently consists of a full IBIS v4.1 parser and an IBIS to SPICE translator. IBIS (I/O Buffer Information Specification) is a standard, human-readable, machine-readable format for publishing IC specifications.
Updated 28 Nov 2004
gschem2xpcb
| Pop | 16.88 |
|---|---|
| Vit | 1.00 |
gschem2xpcb creates a new printed circuit board layout for xpcb from a gschem schematic with the parts neatly arranged outside the board margins ready for manual placement.
Updated 28 Nov 2004
annotate_gschem
| Pop | 16.52 |
|---|---|
| Vit | 1.00 |
annotate_gschem can annotate (number part REFDESs) a schematic drawn with gschem. It can optionally renumber the same parts on a board file drawn with xpcb.
Updated 11 Sep 2004
Alliance CAD System
| Pop | 105.07 |
|---|---|
| Vit | 1.74 |
Alliance CAD System is a set of EDA tools and portable cell libraries for VLSI design. It covers a wide range of the standard design flow (from VHDL up to layout). It includes a VHDL simulator, RTL synthesis tools, place and route tools, netlist extractor, DRC, and a layout editor.
