Projects / SIMD Viterbi Decoder

SIMD Viterbi Decoder

SIMD Viterbi Decoder provides library functions to decode certain popular error correction codes. This version supports two codes: a rate 1/2, constraint length 7 (r=1/2, k=7) code, and an r=1/2, k=9 code. Four implementations of each decoder are provided. One is in portable C and should run in any GNU C environment. The other three use the IA32 SIMD (single instruction, multiple data) instruction sets: MMX, SSE, and SSE2. The SSE version of the k=7 decoder executes at ~9 megabits/sec on a 1GHz Pentium-III.

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  •  08 Dec 2001 12:00

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