Projects / OpenCPI

OpenCPI

The Open Component Portability Infrastructure (OpenCPI) is a real-time embedded (RTE) middleware solution that simplifies programming of heterogeneous processing applications requiring a mix of field-programmable gate arrays (FPGA), general-purpose processors (GPP), digital signal processors (DSP), and high-speed switch fabrics. The "mix" can be over a lifecycle (technology insertion) as well as within a single implementation (to meet SWAP constraints). CPI improves code portability, interoperability, and performance in FPGA and DSP-based environments by providing well-defined waveform component APIs with a set of infrastructure blocks that act as a hardware abstraction layer (HAL).

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Last announcement

Virtex-6 ML605 Gen-2 PCIe Support 20 Feb 2010 00:45

Xilinx has bumped the Gen-2 PCIe core to revision 1.4 in ISE 11.4, and the latest drop of OpenCPI supports Gen2 operation with the ML605. We are working with Xilinx to ensure a smooth transition to ISE 12 as soon as it becomes public. A short video of three development systems is linked here: http://www.youtube.com/watch?v=y2lRSuy__-c

Recent comments

16 Apr 2011 02:31 imipak

The project has a bug reporting URL (http://bugs.opencpi.org/) and the developer's weblink is broken (I believe the correct link is now https://github.com/opencpi/). The project is getting regular updates but this page is not, which is sad as this is an important way to know about what software is out there.

20 Feb 2010 00:43 openCPI

Virtex-6 ML605 Gen-2 PCIe Support
Xilinx has bumped the Gen-2 PCIe core to revision 1.4 in ISE 11.4, and the latest drop of OpenCPI supports Gen2 operation with the ML605. We are working with Xilinx to ensure a smooth transition to ISE 12 as soon as it becomes public. A short video of three development systems is linked here:http://www.youtube.com/watch?v=y2lRSuy__-c

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