Version 1.50 of Flat Assembler

Release Notes: This release features major changes to the code generator, resulting in better-optimized binaries.

Other releases

  •  18 Apr 2012 21:34

Release Notes: This release implements many new instruction sets, including AVX, AVX2, FMA, FMA4, XOP, BMI, TBM, HLE, and RTM. Half-precision floating point numbers are now supported. The "rept" directive has been extended to allow calculating the values of numerical expressions during the preprocessing stage. It is now possible to generate dynamically-linked ELF executables directly, without linking. The "assert" directive and "relativeto" operator have been added.

  •  14 Jun 2009 08:10

    Release Notes: Full support for SSE4, SVM, and SMX instruction set extensions has been added. Ability to generate Portable Executable files for UEFI has been introduced. Several other smaller additions and fixes concluding the 1.67.x development line were included in this milestone release.

    •  15 Nov 2008 21:47

    Release Notes: The optional output of symbolic information was added, and the tools that allow you to extract data from this file and show it in a human-readable form are provided. Several minor fixes and enhancements were applied at the same time.

    •  19 Mar 2007 22:27

    Release Notes: 32-bit relocations are now allowed in PE64 output format. EIP-relative addressing was added. The PLT operator was added for the ELF output format. SSSE3 (Supplemental SSE3) instructions were added. Some Win64 headers and examples were provided in the Windows package. The SYSRETQ mnemonic was added, and RDMSRQ/WRMSRQ/SYSEXITQ mnemonics were added for the 64-bit variants of respective instructions. R8L-R15L (Intel-style) aliases were added for R8B-R15B registers. Support for the AMD SVM technology instructions was added. Numerous bugs were fixed.

    •  01 Jul 2006 14:15

    Release Notes: Support was added for outputting the 32-bit address relocations in case of 64-bit object formats. The PE formatter now automatically detects whether code and data addresses should be relocatable. The instructions of the SVM extension of the AMD architecture have been implemented.

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