DOLPHIN SMASH

Release Notes: This release implements major improvements among which domain coloring for a first approximation of the pole/zero locations, a .PZ directive for pole/zero analysis, support of .wav files as ouput of logic designs, and CCS segmentation extraction processing functions.

Release Notes: This release implements reading of .wav formats in logic for audio based test benches and Verilog language compliance improvements, along with a number of minor corrections.

Release Notes: This release delivers support for VHDL 1076-2008 protect tool directives and Verilog 1364-2005 protected envelopes allowing exchange of HDL descriptions in which portions are encrypted. A number of minor fixes and improvements are also included.

Release Notes: This release implements major improvements including extended Assertion-Based Verification (ABV) capabilities with SystemVerilog Assertions (SVA), compliance with Verilog-AMS wreal for Real Valued Modeling (RVM), increased Verilog-HDL and Verilog-A language compliance, improved HSpice compatibility with .IF,.ELSIF,.ELSE,.ENDIF conditional generate statements, and accelerated circuit loading, Monte Carlo and Sweep analysis.

Release Notes: This release delivers a significant speed increase for the loading of SPICE library files and circuits, particularly significant when accessing files on slow network disks. A number of minor enhancements and fixes were also made.